ARM Assembly Implementation on FPGA
April 2023
Abstract
Given a rudimentary microcontroller architecture and implementation. I was tasked to design components of a microcontroller using behavioral descriptions. Specifically, assembly instructions. In addition, development of test benches are required to verify the behavior of all new microcontroller instructions and functions. This project was completed successfully by implementing all the intended assembly instructions.
Project Requirements
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Implement the following instructions unto the microcontroller architecture:
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BCDO - BCD Output
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DEB - Debounce
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BNZ - Branch if Not Zero
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BVC - Branch if Overflow Clear
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BZ - Branch if Zero
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What does each instruction do?
BCDO - BCD Output
This instruction takes the form "BCDO R" where "R" stands for either a register A or B. This instruction takes the lower 4 bits of the register, decodes them as a BCD number (from 0 through 9) and sends the 7-segment LED representation of this number to Output Port #0. Similarly, the upper 4 bits of the register are decoded as a BCD number and sent as a 7-segment LED representation to Output Port #1. These output ports represent the LEDs connected to the FPGA Dev board.
DEB - Debounce
This instruction may either take the form “DEB 0, R” or “DEB 1, R” where “R” stands for either register A or B. This instruction returns the debounced status of Input #0 bit 0 (for DEB 0) or Input #0 bit 1 (for DEB 1). If this bit has remained at a logic 0 for the last 40ms, the DEB instruction should set the target register (A or B) to 1, else the target register should be set to 0.
BNZ - Branch if Not Zero
This two-byte instruction transfers execution to a new location in memory (given in the second byte, just like for LOAD/STOR) only if the Z bit is a logic 0. All 512 memory locations must be reachable with this instruction.
BVC - Branch if Overflow Clear
This two-byte instruction branches to the specified memory location (given in the second byte, just like for LOAD/STOR) only if the V bit is currently clear. All 512 memory locations must be reachable by this instruction.
BZ - Branch if Zero
This two-byte instruction transfers execution to a new location in memory (given in the second byte, just like for LOAD/STOR) only if the Z bit is a logic 1. All 512 memory locations must be reachable with this instruction.
Implementation
BCDO - BCD Output
Given a previous implementation of 7-segment display decoder, the instruction was built upon this. The 7-segment decoder toggles the respective LEDs (a - g) to show the correct number in the display as shown below.
To implement the Binary Coded Decimal (BCD) logic was implemented internal to the
